美国圣母大学Suman Datta教授和比利时鲁汶大学Cor Claeys教授到访微纳电子学研究院
2018年11月5日下午，美国圣母大学Suman Datta教授和比利时鲁汶大学Cor Claeys教授应邀访问微纳电子学研究院，在微纳电子大厦103报告厅分别做了题为 “From Ferroelectrics to Ferroelectronics”和“Low Frequency Noise Characterization as a Diagnostic Tool for Quality Assessment of Advanced Semiconductor Materials and Devices”的学术报告。
微纳电子学研究院院长黄如院士、蔡一茂研究员、黎明研究员、杨玉超研究员、王润声副教授、许晓燕副教授，黄芊芊助理教授，以及相关研究方向的学生参加了报告会，并与报告人进行了深入、热烈的讨论。
SUMAN DATTA教授
Cor Claeys教授
From Ferroelectrics to Ferroelectronics
Research discovery of ferroelectricity in doped hafnium dioxide thin films has ignited tremendous activity in exploration of ferroelectric FETs for a range of applications from low-power logic to embedded non-volatile memory to in-memory compute kernels. In this talk, I will present key milestones in the evolution of Ferroelectric Field Effect Transistors (FeFETs) and the emergence of a versatile Ferroelectronic platform. I will begin with a critical review of steep slope FeFETs for logic applications. Nonvolatile memory in logic circuits (such as non-volatile flip flops and SRAM) using FeFETs will be discussed in the context of incidental or intermittent computing targeted for extremely energy constrained applications. Next, I will discuss the application of FeFETs as an analog multi-level weight storage and weight update unit for accelerating in-situ hardware training for deep neural networks. I will conclude with our current understanding of the physics of multi-domain switching in doped HfO2 thin films, and its significance for various ferroelectronic applications.
Low Frequency Noise Characterization as a Diagnostic Tool for Quality Assessment of Advanced Semiconductor Materials and Devices
Interest in low-frequency noise has increased significantly in recent years, even for CMOS logic devices, as it has become a source of temporal variability. It is also an important parameter for analog and RF circuit applications. The potential of low frequency noise diagnostics for the characterization of semiconductor materials and devices will be demonstrated. First a brief review is given of the physics related to fundamental noise mechanisms (white noise, 1/f noise, GR noise). For scaled down technologies, Random Telegraph Signals (RTS) are becoming dominant. Noise analysis gives information on the quality of gate dielectrics and interfaces, outlines the impact of processing steps such as stress engineering, replacement gate processing, metallization schemes, etc. and can be correlated with the device reliability. Examples will be given of LF noise behavior of advanced CMOS devices like SOI devices, memory devices, FinFETs, tunnelFETs, nanowire transistors, 2D transistors etc. The noise performance of Ge-based and III-V technologies processed on a Si platform will also be addressed.